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Engineer Testing Semiconductor Chips in Wafer Fab
Engineer Testing Semiconductor Chips in Wafer Fab
2 years ago

Engineer

Created 2 years ago ยท 0 commentsยท 0 likes

SDXL 1.0

#open-prompt-gang

Engineer

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Creation Summary by Vincent

Engineer Testing Semiconductor Chips in Wafer Fab

A realistic image of an engineer in a wafer fabrication facility. The engineer, wearing a nametag, is testing semiconductor chips in a cleanroom environment.

Created by LadyMorningstar on Jan 24, 2024 using the SDXL 1.0 AI image generator model.


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Creation Settings

Text Prompts
Engineer wearing nametag that reads "Xpeerant", working in wafer fab, testing semiconductor chips, realistic
Weight: 1
Model
SDXL 1.0
CKPT

SDXL 1.0

Initial Resolution

Medium

Aspect Ratio

1:1

Runtime

Short

Overall Prompt Weight

50%

Refiner Weight

50%

Sampling method

K_DPMPP_2M


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